What is RISC, what is RISC V and how do they differ?

When it comes to processors, x86 and ARM are the two terms that come up the most, especially when we talk about recent devices. But there are many more architectures. For example, you may have heard the names RISC and RISC-V floating around every now and then.

Despite having similar names, they couldn’t be more different concepts. So what is RISC and what is RISC-V? And what’s the difference?

What is RISC?

RISC is a broad term meaning ‘computer with limited instruction set’. Basically, a RISC computer is essentially designed to execute simpler, individual instructions. Compared to a CISC (complex instruction set computer), a RISC processor uses a uniform instruction length for almost all instructions. CISC statements, on the other hand, are more complex and can perform low-level, multi-step operations.

For simplification, RISC processors can execute simpler, unified instructions, while CISC can execute instructions of varying complexity and scope. Each RISC statement can only do one thing at a time while CISC statements can do several things at once. Because instructions are written in simpler code and are simpler in nature, RISC processors often require more instructions to perform the same tasks as CISC processors. This difference can be compensated for by increasing the speed at which that RISC CPU can perform those tasks using pipelining. Because they are simpler, RISC processors can also be designed faster than CISC processors and can run more efficient code.

Since RISC is not an architecture per se, but rather a broad term, many CPU architectures can be considered RISC. One of the most well-known RISC processor architectures is ARM, which powers our smartphones and, more recently, some of our laptops and computers. Others include PowerPC, which has long been used in Apple computers and game consoles. Meanwhile, x86 can be considered a CISC design as it is more complex.

The RISC term was coined by the Berkeley RISC research project led by David Patterson at the University of California, Berkeley, from 1980 to 1984. It turned out that the project was really successful, and the term “RISC” would describe all computers with a reduced instruction set – even a competing Stanford University MIPS project developed around the same time eventually came to be known as a RISC architecture. As for that particular Berkeley project, it was later used by the SPARC microarchitecture developed by Sun Microsystems – an architecture that would eventually serve as inspiration for the ARM architecture in our smartphones.

What is RISC-V?

While RISC in itself is not a specific architecture, you may have been confused by one architecture that grabs and uses the RISC name. That’s RISC-V. It is an instruction set architecture (ISA), developed by the University of California, Berkeley, that aims to embody the principles of a RISC processor while being an open source standard. While ARM, the most well-known RISC architecture, is proprietary and requires licensing from chipmakers, RISC-V is intended to be royalty-free and, in general, free to use for anyone.

RISC-V began development in 2010 and was released to the open community in 2015. Of course, when RISC-V was released, ARM was already in millions of smartphones around the world. But unlike ARM, RISC-V was developed and released with the aim of making available a CPU design that was open source, scalable and could be implemented on any device without any kind of royalties. According to the designers, having a free-to-use CPU architecture can dramatically lower the cost of software by allowing for much more reuse and allowing for more competition.

RISC-V is not an architecture widely deployed on smartphones or anything like that – after all, most use ARM or x86. Still, it sees some use. More specifically, RISC-V has been used in cloud computing, servers and embedded applications. Well-known RISC-V based designs include the Titan M2 security chip used by Pixel smartphones. There are more planned use cases for the RISC-V architecture in the future, including those from major companies such as NVIDIA and Seagate. Because it is royalty free, it lowers costs and is ultimately better for everyone.

RISC vs RISC-V: What’s the Difference?

At first glance, some people may think that RISC-V is a variant of RISC and that RISC is an instruction set architecture. After all, they have similar names, so there may very well be room for confusion. But that couldn’t be further from the truth. As we described earlier, the difference is that one is an actual instruction set architecture while the other is an umbrella term that encompasses multiple CPU architectures.

As we mentioned before, RISC is a broad term used to talk about computers with a reduced instruction set – this term encompasses a wide variety of CPU architectures with simpler designs and capabilities, some of which are actively used by billions of devices and others that are amortized over time. And the term exists to distinguish these types of computers from CISCs, or complex instruction set computers, a term used to describe the x86 architecture used by most PCs worldwide, as well as a handful of others.

And then RISC-V is an instruction set architecture based on a RISC design, but compared to other RISC architectures like ARM, RISC-V was open-source rather than proprietary, meaning any chipmaker could design RISC-V based designs. can make without paying royalties or licensing fees for anyone. It is designed to be used for a variety of purposes and it is supported by many silicon manufacturers and by many open source operating systems.

One describes a category of CPUs while the other is a CPU architecture in the proper sense of the word which is an alternative to ARM and other RISC CPUs.

RISC-V and RISC are not the same

The term RISC is used to talk about certain types of processors, and it is a term that defines a wide variety of architectures. Still, some people mistakenly think that RISC is a CPU architecture. Those that do probably think of RISC-V instead, confusing it with the RISC term. Now, you know the difference.

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